At Vertiv, we're on a mission to empower the people that will power the future. From a simple swipe to life-changing medicines, from push notifications to generative AI. We design, manufacture, and service the products and solutions that keep the world connected. With $6.9 billion in revenue, a strong customer base and global reach spanning nearly 70 countries, we are uniquely positioned to deliver greater value to our customers and create new opportunities for our people.
Vertiv is looking for a Hardware Development Engineer to join our Single Phase UPS team in Zagreb, Croatia.
POSITION SUMMARY
As a member of Vertiv's Single Phase UPS R&D team in Zagreb, you will join a group of skilled colleagues working on innovative projects in an inspiring environment, where you can develop your skills and expertise in designing low-power energy electronics circuits. Help ensuring that our products meet the highest standards of design and manufacturing quality. Participate in the entire product development process from start to finish. Based on market requirements, you will prepare engineering specifications, provide feedback to various functional teams, work on electronic and PCB design, troubleshoot potential errors, address testing challenges, and resolve issues with already delivered devices.
RESPONSIBILITIES
- Development and design of power converters based on GaN, SiC and Si technologies and control electronics
- Selection and calculation of components
- Testing of hardware components and prototypes
- Analysis of hardware operation and performance
- Preparation of technical specifications, material and component specifications
- Cooperation with teams from the fields of power electronics, mechanical engineering, software and testing
- Conducting electronics design reviews
- Creation of test specifications and procedures
- Design validation
- Cooperation and support to production, users and suppliers
- Active participation in conducting experimental tests
- Participation in debugging of designs and devices
QUALIFICATIONS:
- Degree in Electrical Engineering with a focus on power electronics
- Minimum 3 years of experience
- Experience working in Altium Designer or similar tools
- Experience in signal integrity analysis
- DSP or FPGA (HW) design experience
- Experience in communication protocols (SPI, I2C, CAN,...)
- Knowledge of PSIM, PLECS and/or LTSpice simulation tools
- Knowledge of power and analog-digital electronics
- English minimum B2 level
What do we offer?
- Access to internal training and external development opportunities
- Coverage of public transportation costs
- UNIQA supplementary health insurance for added security
- Special occasion bonuses (Easter, Christmas, performance-based rewards, and child-related bonuses)
- Free annual health check-up to support your well-being (Croatia Osiguranje)
- Opportunity to sign up for a MultiSport card for an active lifestyle
- Fresh fruit delivered every Monday for a healthy start to the week
- Referral bonuses as a thank-you for helping us grow our team
- Financial support for new parents with a non-taxable baby bonus
- Assistance in difficult times with a non-taxable allowance for the loss of an immediate family member
- Professional development through mentorship and training
- International teams and dynamic environment
- Contribution to projects of high technical complexity with modern technical challenges
- Full creative and professional freedom
- Flexible working hours
- Positive, casual, friendly, team-based working atmosphere
- Focus on competence development
About Us
The successful candidate will embrace Vertiv’s Core Principals & Behaviors to help execute our Strategic Priorities.
OUR CORE PRINCIPALS: Safety. Integrity. Respect. Teamwork. Diversity & Inclusion.
OUR STRATEGIC PRIORITIES
- Customer Focus
- Operational Excellence
- High-Performance Culture
- Innovation
- Financial Strength
OUR BEHAVIORS
- Own It
- Act With Urgency
- Foster a Customer-First Mindset
- Think Big and Execute
- Lead by Example
- Drive Continuous Improvement
- Learn and Seek Out Development
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